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High-Speed DACs towards High Performance and Efficiency
Event Details
There are increasing interests in wideband and flexible waveform synthesis in modern communication systems. The key enabler in such applications is a high performance digital-to-analog converter (DAC). This has motivated the design community to push the digital-to-analog converter (DAC) towards higher sampling rate (>GS/s) while achieving high dynamic range. Moreover, there is an emerging trend to design a DAC with high output power, i.e. a power DAC or digital power amplifier (PA). In this talk, I will overview various digital-to-analog architectures and filtering techniques that push the envelope of DAC bandwidth, linearity and/or noise floor. A dual-rate hybrid DAC architecture has been shown to enhance dynamic range while a time-approximation filter can be applied to suppress out-of-band emission. In addition, I will introduce an emerging digital PA architecture that aims for high power backoff efficiency, namely sub-harmonic switching (SHS) PA. Validated by a series of silicon prototypes, the proposed DAC architectures when used individually or jointly show a promising path towards high performance and efficiency.
March 21, 2025
Join Zoom Meeting
https://usc.zoom.us/j/97017422125?pwd=Dbrt8MNMrmBV3xalKQJcAiNsggFJjJ.1&from=addon
Meeting ID: 970 1742 2125
Passcode: 937624
Host: Steve Crago
POC: Amy Kasmir